Henry Samueli, CTO of Broadcom, makes the same point about Moore's Law. As the feature size of successive chip generations decreases, the cost of the manufacturing technology increases. And the techniques needed, such as FinFET and other 3D technologies, also slow down and increase the cost of using the manufacturing technology:
Process nodes themselves still have room to advance, but they may also be headed for a wall in about 15 years, Samueli said. After another three generations or so, chips will probably reach 5nm, and at that point there will be only 10 atoms from the beginning to the end of each transistor gate, he said. Beyond that, further advances may be impossible.Both of these are simply applications of the Law of Diminishing Returns.
"You can't build a transistor with one atom," Samueli said. There's no obvious path forward at that point, either. "As of yet, we have not seen a viable replacement for the CMOS transistor as we've known it for the last 50 years."
... the ongoing bargain of getting more for less eventually will end, Samueli said. "We've been spoiled by these devices getting cheaper and cheaper and cheaper in every generation. We're just going to have to live with prices leveling off," he said.
Rachel Courtland at IEEE Spectrum has a piece called The Status of Moore's Law: It's Complicated. She points out that the "node names" that used to measure progress, from 20nm to 14nm to 10nm, no longer refer to the size of the transistors:
"But the relationship between node names and chip dimensions is far from straightforward. Nowadays, a particular node name does not reflect the size of any particular chip feature, as it once did. And in the past year, the use of node names has become even more confusing, as chip foundries prepare to roll out 14-nm and 16-nm chips, custom-made for smartphone makers and other customers, that will be no denser than the previous 20-nm generation. That might be just a temporary hiccup, a one-time-only pause in chip-density improvement. But it’s emblematic of the perplexing state of the field."
And it isn't just that the dimensions aren't shrinking as fast as they used to, it is also that the overheads, such as error-correction and adapting to performance variation, involved in coping with the "smaller" transistors are increasing:
"When you factor those circuits in, chips are no longer twice as dense from generation to generation. In fact, Kahng’s analysis suggests, the density improvement over the past three generations, from 2007 on, has been closer to 1.6 than 2. This smaller density benefit means costlier chips, and it also has an impact on performance because signals must be driven over longer distances. The shortfall is consistent enough, Kahng says, that it could be considered its own law."
The Economist notices the problem. In a piece entitled No Moore they say:
"In 2002 a dollar purchased about 2.6m transistors with features as small as 180 nanometres, or millionths of a millimetre. In 2014 transistors with features one-ninth that size will cost just 20m to the dollar. Yet shrinking transistors further will make them more expensive. In 2015 a dollar will buy 19m (see chart). This is because an expensive basket of technologies must be developed for each new generation of smaller transistors (they are already smaller than the wavelength of the light with which they are etched)."
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